Recently, an energy consumption reduction technique for a processor in a mobile device has become essential. Such a processor is equipped with a static random access memory (SRAM) as a cache memory in which data frequently used by the processor is stored. Since the SRAM is volatile, it is necessary to continuously apply a power supply voltage to the SRAM to maintain stored data. Therefore, in the SRAM, energy, although small, is wasted by a leakage current during standby, when there is no access from the processor.
As a way of reducing the leakage current and so reducing the energy consumption of the processor, a nonvolatile SRAM that can continue to hold data even during standby when power is not being supplied is expected.
A nonvolatile SRAM that is known at present is disclosed in Japanese Journal of Applied Physics 48 (2009) 043001 by Shuichiro Yamamoto and Satoshi Sugahara.
The nonvolatile SRAM reduces leakage current during standby by storing data in a spin-transfer magnetic tunnel junction (MTJ) element.
The MTJ element is a resistance-change nonvolatile memory element whose resistance varies according to a difference in a direction in which a write current is passed. The MTJ element has a feature that the data write time is short and the endurance is high among the nonvolatile memory elements.
As shown in FIG. 1 of Japanese Journal of Applied Physics 48 (2009) 043001 by Shuichiro Yamamoto and Satoshi Sugahara, a memory cell of the conventional nonvolatile SRAM (hereinafter referred to as a nonvolatile SRAM cell) is configured by connecting one end of an MTJ element to nodes of cross-coupled inverters and connecting the other end of the MTJ element to a control line.
In this case, a data holding node Q and an inverted data holding node/Q are connected to each other via the MTJ element and control line CTRL. Therefore, when the resistance of the MTJ element in a high-resistance state is less than the resistance of a turned-off transistor, a leakage current flows between the data holding node Q and the inverted data holding node/Q, and the energy consumption increases.
Further, in order to write data to the MTJ element, a control line is required. Therefore, the area of the nonvolatile SRAM cell becomes larger in comparison with that of a memory cell of a volatile SRAM and the number of interconnect layers increases.